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Produktinformation
Produktöversikt
NB6N14SMNR2G is a differential 1:4 clock or data receiver and will accept AnyLevel differential input signals: LVPECL, CML or LVDS. These signals will be translated to LVDS and four identical copies of clock or data will be distributed, operating up to 2.0GHz or 2.5Gb/s, respectively. As such, the NB6N14S is ideal for SONET, GigE, fibre channel, backplane and other clock or data distribution applications. The NB6N14S has a wide input common mode range from GND + 50mV to VCC - 50mV. Combined with the 50 internal termination resistors at the inputs, the NB6N14S is ideal for translating a variety of differential or single−ended Clock or Data signals to 350mV typical LVDS output levels.
- Maximum input clock frequency <gt/> 2.0GHz
- Maximum input data rate <gt/> 2.5Gb/s
- 1ps maximum RMS clock jitter
- Typically 10ps data dependent jitter
- 380ps typical propagation delay
- 120ps typical rise and fall times
- VREF_AC reference output
- TIA/EIA − 644 compliant
- Functionally compatible with existing 3.3V LVEL, LVEP, EP and SG devices
Tekniska specifikationer
Fanout Buffer, Translator
4Outputs
3.6V
16Pins
85°C
-
No SVHC (27-Jun-2024)
2GHz
3V
QFN
-40°C
-
MSL 1 - Unlimited
Teknisk dokumentation (1)
Lagstiftning och miljö
Det land där den sista betydelsefulla tillverkningsprocessen utfördesUrsprungsland:Thailand
Det land där den sista betydelsefulla tillverkningsprocessen utfördes
RoHS
RoHS
Certifikat för produktefterlevnad