74LVC2G17GV,125
Buffer, 74LVC2G17, 1.65 V to 5.5 V, TSOP-6
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| Antal | |
|---|---|
| 5+ | 2,160 kr |
| 50+ | 1,350 kr |
| 100+ | 1,170 kr |
| 500+ | 1,070 kr |
| 1500+ | 1,020 kr |
Produktinformation
Produktöversikt
The 74LVC2G17GV,125 is a dual non-inverting Buffer with Schmitt trigger input. It is capable of transforming slowly changing input signals into sharply defined, jitter-free output signals. Inputs can be driven from either 3.3/5V devices. This feature allows the use of these devices as translators in a mixed 3.3 and 5V environment. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.
- High noise immunity
- CMOS low-power consumption
- Direct interface with TTL levels
- Complies with JEDEC standard
- 5V Tolerant input/output for interfacing with 5V logic
- Latch-up performance exceeds 250mA
- ±24mA Output drive
Tillämpningar
Industrial, Automation & Process Control, Signal Processing
Tekniska specifikationer
Buffer, Schmitt Trigger
TSOP
6Pins
5.5V
742G17
125°C
-
No SVHC (21-Jan-2025)
74LVC2G17
TSOP
1.65V
74LVC
-40°C
-
MSL 1 - Unlimited
Teknisk dokumentation (2)
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Det land där den sista betydelsefulla tillverkningsprocessen utfördesUrsprungsland:United States
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